_Posted on February 09, 2026_ In [[Power-On Reset (Booting Pt1)]], we discussed how an incoming power signal triggers the power on state machine (POSM) by setting the `rst_n_psm` signal high. Next, we explore what this means and how the POSM internals bring the processor into a properly initialized state. ![[Pasted image 20260206160350.png]] _Power-on state machine (from [RP2040 datasheet](https://datasheets.raspberrypi.com/rp2040/rp2040-datasheet.pdf))_ First, `rst_n_psm` is the _reset_ signal for the POSM. The role of power-on reset is to ensure that this reset signal is held low until the power input is stable. This low signal is propagated to every component in the figure above, and holds them in a inactive (reset) state. This is necessary because otherwise, during initialization with an (initially) unstable power supply, these components will be in an undefined state. The role of the POSM is to progressively move components into their intended initial states. Importantly, this occurs in a particular order (displayed above) so that dependencies for each component are satisfied before thier initialization. For each component, there are two signals relevant to the initialization process: `rst_n`, and `rst_done`. The `rst_n` signal is a reset signal that is active when it is set low. For a given peripheral, the POSM sets `rst_n` high, waits for `rst_done` to be set (asserted), then continues to the next component. The details of each component are included in the [RP2040 datasheet](https://datasheets.raspberrypi.com/rp2040/rp2040-datasheet.pdf), but we go over a few details as follows: The first component is a ring oscillator, which is built from an odd number of inverts connected in a loop (like the oscillator introduced in chapter 17 of _Code: The Hidden Language of Computer Hardware and Software_ by Charles Petzold). In this case, `rst_n` being set low is analogous to the open switch in the figure on page 215 of _Code_, and setting `rst_n` high is analogous to closing that switch. In some other components, the state is held in flip-flops, and `rst_n` is equivalent to the clear signal in the flip-flops with clear, also introduced in chapter 17 of _Code_. Relevant to the next boot step is the ROM / SRAM, and processor complex. The 16 kB on-chip ROM is mapped at address 0x00000000, and contains the [[Stage 1 Bootloader|first stage bootloader]]. Once the processor complex is initialized, it immediately starts execution of the first stage bootloader.